Title | Experimental and simulated results of room temperature single electron transistor formed by atomic force microscopy nano-oxidation process |
Publication Type | Journal Article |
Year of Publication | 2000 |
Authors | Gotoh, Y., Matsumoto K., Bubanja V., Vazquez F., Maeda T., and Harris J.S. |
Journal | Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers |
Volume | 39 |
Issue | 4 B |
Pagination | 2334 - 2337 |
Date Published | 2000 |
ISSN | 00214922 (ISSN) |
Keywords | Atomic force microscopy, Capacitance, computer simulation, Coulomb oscillation, MATHEMATICAL MODELS, Nanooxidation process, Nanotechnology, Oxidation, Semiconductor device manufacture, Single electron transistor, Substrates, Temperature, Three dimensional simulation, Transistors, Tunnel junctions |
Abstract | A planar-type single electron transistor (SET) was fabricated by the atomic force microscopy (AFM) nano-oxidation process. The fabricated SET showed the Coulomb oscillation characteristic with the period of about 2 V at room temperature. From the three-dimensional simulation, it is found out that the smaller the SET island size, the smaller the tunnel junction capacitance, and the tunnel junction capacitance shows a weak dependence on the tunnel junction width. Using the analytical model, the reason for this weak dependence was clarified. ©2000 The Japan Society of Applied Physics. |
URL | http://www.scopus.com/inward/record.url?eid=2-s2.0-0033720650&partnerID=40&md5=667fe436f66936db8802c0fb0f6434a0 |