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TitleExperimental and simulated results of room temperature single electron transistor formed by atomic force microscopy nano-oxidation process
Publication TypeJournal Article
Year of Publication2000
AuthorsGotoh, Y., Matsumoto K., Bubanja V., Vazquez F., Maeda T., and Harris J.S.
JournalJapanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers
Issue4 B
Pagination2334 - 2337
Date Published2000
ISSN00214922 (ISSN)
KeywordsAtomic force microscopy, Capacitance, computer simulation, Coulomb oscillation, MATHEMATICAL MODELS, Nanooxidation process, Nanotechnology, Oxidation, Semiconductor device manufacture, Single electron transistor, Substrates, Temperature, Three dimensional simulation, Transistors, Tunnel junctions
AbstractA planar-type single electron transistor (SET) was fabricated by the atomic force microscopy (AFM) nano-oxidation process. The fabricated SET showed the Coulomb oscillation characteristic with the period of about 2 V at room temperature. From the three-dimensional simulation, it is found out that the smaller the SET island size, the smaller the tunnel junction capacitance, and the tunnel junction capacitance shows a weak dependence on the tunnel junction width. Using the analytical model, the reason for this weak dependence was clarified. ©2000 The Japan Society of Applied Physics.

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